Development of tools for the simulation of nanometric transistors using advanced computational architectures

  1. Indalecio Fernández, Guillermo
Zuzendaria:
  1. Antonio García Loureiro Zuzendaria
  2. Natalia Seoane Iglesias Zuzendarikidea

Defentsa unibertsitatea: Universidade de Santiago de Compostela

Fecha de defensa: 2016(e)ko urria-(a)k 20

Epaimahaia:
  1. Francisco Gámiz Pérez Presidentea
  2. Paula López Martínez Idazkaria
  3. Marc Bescond Kidea

Mota: Tesia

Laburpena

The aim of this thesis project is the study of nanoscale semiconductor devices, including new options based on new architectures and designs, for which multidimensional simulation tool based on Monte-Carlo models are going to be developed, including quantum corrections by solving the Schrödinger equation in the transverse direction to the propagation of carriers within the device. So far, our research group has developed several simulators semiconductor devices using various simulation techniques. This work is developed in collaboration with several national and international groups. It should primarily highlight the group maintains collaborations with the universities of Glasgow, Swansea and Granada and gives rise to this thesis project.The ultimate goal is to use the simulator to study various optimized, especially classical electronic devices, SOI-based and multigate, with silicon devices for sizes of under 10 nm.