Simulation of serial RRAM cell based on a Verilog-A compact model

  1. Yang, B.
  2. Arumi, D.
  3. Manich, S.
  4. Gomez-Pau, A.
  5. Rodriguez-Montanes, R.
  6. Roldan, J.B.
  7. Gonzalez, M.B.
  8. Campabadal, F.
  9. Fang, L.
Actas:
36th Conference on Design of Circuits and Integrated Systems, DCIS 2021

ISBN: 9781665421164

Año de publicación: 2021

Tipo: Aportación congreso

DOI: 10.1109/DCIS53048.2021.9666174 GOOGLE SCHOLAR