ANTONIO
LLORÍS RUIZ
Ikertzailea 2017-2018 tartean
ANTONIO LLORÍS RUIZ-rekin lankidetzan egindako argitalpenak (3)
2017
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A new area-efficient BCD-digit multiplier
Digital Signal Processing: A Review Journal, Vol. 62, pp. 1-10
2016
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Comments on “Fast architecture for decimal digit multiplication”
Microprocessors and Microsystems, Vol. 47, pp. 441-444
2007
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Digital signature embedding technique for IP core protection
Proceedings - 2007 3rd Southern Conference on Programmable Logic, SPL'07