FRANCISCO JOSÉ
PELAYO VALLE
CATEDRÁTICO DE UNIVERSIDAD
Swiss Center for Electronics and Microtechnology (Switzerland)
Neuchâtel, SuizaPublications en collaboration avec des chercheurs de Swiss Center for Electronics and Microtechnology (Switzerland) (1)
1997
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VLSI Implementation of a Neural Model Using Spikes
Analog Integrated Circuits and Signal Processing, Vol. 13, Núm. 1-2, pp. 111-121