Publicaciones en las que colabora con JAVIER RAMÍREZ PÉREZ DE INESTROSA (29)

2005

  1. Cost-effective Hogenauer cascaded integrator comb decimator filter design for custom ICs

    Electronics Letters, Vol. 41, Núm. 3, pp. 158-160

  2. Efficient RNS-based design of programmable fir filters targeting FPL technology

    Journal of Circuits, Systems and Computers, Vol. 14, Núm. 1, pp. 165-177

  3. Efficient embedded FPL resource usage for RNS-based polyphase DWT filter banks

    Proceedings - 2005 International Conference on Field Programmable Logic and Applications, FPL

2004

  1. Area*Time optimized hogenauer channelizer design using FPL devices

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Vol. 3203, pp. 384-393

  2. Efficient wavelet architectures using field-programmable logic and residue number system arithmetic

    Proceedings of SPIE - The International Society for Optical Engineering

2003

  1. A High Radix CORDIC Architecture Dedicated to Compute the Gaussian Potential Function in Neural Networks

    Proceedings of SPIE - The International Society for Optical Engineering

  2. A fast QRNS-based algorithm for the DCT and its field-programmable logic implementation

    Journal of Circuits, Systems and Computers, Vol. 12, Núm. 1, pp. 111-123

  3. Design and implementation of RNS-based adaptive filters

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Vol. 2778, pp. 1135-1138

  4. Design and implementation of high-performance RNS wavelet processors using custom IC technologies

    Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, Vol. 34, Núm. 3, pp. 227-237

  5. Implementation of RNS-based distributed arithmetic discrete wavelet transform architectures using field-programmable logic

    Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, Vol. 33, Núm. 1-2, pp. 171-190

2002

  1. A new methodology for efficient synchronization of RNS-based VLSI systems

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

  2. Clock distribution in RNS-based VLSI systems

    Advances in Systems Engineering, Signal Processing and Communications, pp. 323-328

  3. Fast RNS FPL-based communications receiver design and implementation

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

  4. Low power high speed algebraic integer frequency sampling filters using FPLDs

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

  5. RNS-enabled digital signal processor design

    Electronics Letters, Vol. 38, Núm. 6, pp. 266-268

2001

  1. Design of RNS-based distributed arithmetic DWT filterbanks

    ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings, Vol. 2, pp. 1193-1196

  2. Implementation of the One Dimensional Discrete Cosine Transform using the Residue Number System

    Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

  3. Index-based RNS DWT architectures for custom IC designs

    IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation

2000

  1. A RNS-based matrix-vector-multiply FCT architecture for DCT computation

    Midwest Symposium on Circuits and Systems, Vol. 1, pp. 350-353

  2. A new RNS architecture for the computation of the scaled 2D-DCT on field-programmable logic

    Conference Record of the Asilomar Conference on Signals, Systems and Computers, Vol. 1, pp. 379-383