Publicaciones en las que colabora con ANTONIO LLORÍS RUIZ (39)

2022

  1. Table-Free Seed Generation for Hardware Newton-Raphson Square Root and Inverse Square Root Implementations in IoT Devices

    IEEE Internet of Things Journal, Vol. 9, Núm. 9, pp. 6985-6995

2017

  1. A new area-efficient BCD-digit multiplier

    Digital Signal Processing: A Review Journal, Vol. 62, pp. 1-10

2016

  1. Comments on “Fast architecture for decimal digit multiplication”

    Microprocessors and Microsystems, Vol. 47, pp. 441-444

2012

  1. Minimum-clock-cycle Itoh-Tsujii algorithm hardware implementation for cryptography applications over GF(2 m) fields

    Electronics Letters, Vol. 48, Núm. 18, pp. 1126-1128

2010

  1. Protection of microprocessor-based cores for FPL devices

    6th Southern Programmable Logic Conference, SPL 2010 - Proceedings

  2. Watermarking strategies for IP protection of micro-processor cores

    Proceedings of SPIE - The International Society for Optical Engineering

2009

  1. New advances for automated IP soft-core watermarking

    Proceedings of SPIE - The International Society for Optical Engineering

2008

  1. Automated signature insertion in combinational logic patterns for HDL IP core protection

    Proceedings - 2008 4th Southern Conference on Programmable Logic, SPL

  2. HDL-level automated watermarking of IP cores

    Proceedings of SPIE - The International Society for Optical Engineering

  3. Intellectual property protection of IP cores at HDL design level with automatic signature spreading

    Proceedings - International Conference on Advances in Electronics and Micro-electronics, ENICS 2008

2007

  1. Digital signature embedding technique for IP core protection

    Proceedings - 2007 3rd Southern Conference on Programmable Logic, SPL'07

  2. IPP@HDL: Efficient intellectual property protection scheme for IP cores

    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 15, Núm. 5, pp. 578-591

  3. Intellectual property protection of HDL IP cores through automated signature hosting

    Proceedings - 2007 International Conference on Field Programmable Logic and Applications, FPL

  4. Intellectual property protection of IP cores through high-level watermarking

    Proceedings of SPIE - The International Society for Optical Engineering

2006

  1. RNS-based watermarking for IP cores

    PRIME 2006: 2nd Conference on Ph.D. Research in MicroElectronics and Electronics - Proceedings

2005

  1. Efficient clock distribution scheme for VLSI RNS-enabled controllers

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

  2. Watermarking strategies for RNS-based system intellectual property protection

    IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation

2004

  1. Intellectual property protection for RNS circuits on FPGAs

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

2003

  1. Sistemas digitales

    McGraw-Hill Interamericana de España

2002

  1. A new methodology for efficient synchronization of RNS-based VLSI systems

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)