Pipelined architecture for real-time cost-optimized extraction of visual primitives based on FPGAs

  1. Barranco, F.
  2. Tomasi, M.
  3. Díaz, J.
  4. Vanegas, M.
  5. Ros, E.
Aldizkaria:
Digital Signal Processing: A Review Journal

ISSN: 1051-2004

Argitalpen urtea: 2013

Alea: 23

Zenbakia: 2

Orrialdeak: 675-688

Mota: Artikulua

DOI: 10.1016/J.DSP.2012.09.017 GOOGLE SCHOLAR
Datuen iturria: Scopus