Pipelined architecture for real-time cost-optimized extraction of visual primitives based on FPGAs

  1. Barranco, F.
  2. Tomasi, M.
  3. Díaz, J.
  4. Vanegas, M.
  5. Ros, E.
Revue:
Digital Signal Processing: A Review Journal

ISSN: 1051-2004

Année de publication: 2013

Volumen: 23

Número: 2

Pages: 675-688

Type: Article

DOI: 10.1016/J.DSP.2012.09.017 GOOGLE SCHOLAR
La source de données: Scopus