Publicaciones en las que colabora con Alberto Gonzalez Prieto (20)

1997

  1. Modified boltzmann machine for an efficient distributed implementation

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

1993

  1. Generalized Hopfield Neural Network for Concurrent Testing

    IEEE Transactions on Computers, Vol. 42, Núm. 8, pp. 898-912

  2. Test-Pattern Generation Based on Reed-Muller Coefficients

    IEEE Transactions on Computers, Vol. 42, Núm. 8, pp. 968-980

1991

  1. CMOS current-mode multivalued PLA's

    IEEE transactions on circuits and systems, Vol. 38, Núm. 4, pp. 434-441

  2. Characterization and design of hybrid-mode CMOS circuits

    International Journal of Electronics, Vol. 71, Núm. 4, pp. 591-607

  3. Fast Tamari transform

    IEE Proceedings E: Computers and Digital Techniques, Vol. 138, Núm. 3, pp. 147-153

  4. Implementation and applications of multivalued decoders

    International Journal of Electronics, Vol. 70, Núm. 4, pp. 785-794

  5. Optimization problems on concurrent testing solved by neural networks

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

  6. Universal Built-In Self-Test Procedure for CMOS PLA’s

    IEEE Transactions on Circuits and Systems, Vol. 38, Núm. 8, pp. 941-945

  7. Using reed-muller coefficients to synthesise optimal prediction modules for concurrent testing

    Electronics Letters, Vol. 27, Núm. 14, pp. 1243-1245

1989

  1. Some improvements in the implementation of multithreshold and multivalued I2.L circuits

    International Journal of Electronics, Vol. 66, Núm. 1, pp. 19-34

1988

  1. Design of decoders for Q-valued logic circuits.

    Proceedings of The International Symposium on Multiple-Valued Logic

1985

  1. Multithreshold logic circuits implemented with operational amplifiers

    International Journal of Electronics, Vol. 58, Núm. 3, pp. 395-406

1983

  1. Calculation of potential distribution in homogeneous anisotropic nonlinear dielectrics

    Journal of Applied Physics, Vol. 54, Núm. 11, pp. 6610-6614

  2. Design of active circuits with non-linear transfer characteristics

    International Journal of Electronics, Vol. 54, Núm. 6, pp. 813-824

  3. Distribution of Natural Frequencies in Electrical Ladder Networks

    Proceedings of the IEEE, Vol. 71, Núm. 6, pp. 773-775

1982

  1. IMPLEMENTATION OF THE UNARY OPERATORS IN TERNARY LOGIC: A UNIVERSAL CMOS CIRCUIT.

    International Journal of Electronics, Vol. 52, Núm. 4, pp. 307-311

  2. Numerical calculation of some potential distributions in non-linear dielectrics

    Journal of Electrostatics, Vol. 13, Núm. 2, pp. 139-150

1981

  1. RELAXATION PROCEDURE FOR CALCULATION OF POTENTIAL DISTRIBUTION IN NONLINEAR DIELECTRICS.

    IEE Proceedings A: Physical Science. Measurement and Instrumentation. Management and Education. Reviews, pp. 362-363

1980

  1. C.M.O.S. Circuit for implementation of unary operators in ternary logic

    Electronics Letters, Vol. 16, Núm. 5, pp. 161-162