Real-time architecture for a robust multi-scale stereo engine on FPGA

  1. Tomasi, M.
  2. Vanegas, M.
  3. Barranco, F.
  4. Díaz, J.
  5. Ros, E.
Journal:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems

ISSN: 1063-8210

Year of publication: 2012

Volume: 20

Issue: 12

Pages: 2208-2219

Type: Article

DOI: 10.1109/TVLSI.2011.2172007 GOOGLE SCHOLAR
Data source: Scopus