GRUPO DE INVESTIGACION EN DISPOSITIVOS ELECTRONICOS
GRIDE
Indian Institute of Technology Kanpur
Kanpur, IndiaPublicaciones en colaboración con investigadores/as de Indian Institute of Technology Kanpur (3)
2020
-
Compact Modeling of Multi-Layered MoS2FETs including Negative Capacitance Effect
IEEE Journal of the Electron Devices Society, Vol. 8, pp. 1177-1183
-
Compact Modeling of Surface Potential and Drain Current in Multi-layered MoS2FETs
4th Electron Devices Technology and Manufacturing Conference, EDTM 2020 - Proceedings
2017
-
Modeling of Quantum Confinement and Capacitance in III-V Gate-All-Around 1-D Transistors
IEEE Transactions on Electron Devices, Vol. 64, Núm. 12, pp. 4889-4896