Publicaciones en colaboración con investigadores/as de Università di Udine (11)

2017

  1. A novel reconfigurable sub-0.25-V digital logic family using the electron-hole bilayer TFET

    IEEE Journal of the Electron Devices Society, Vol. 6, Núm. 1, pp. 2-7

2016

  1. Impact of device geometry of the fin Electron-Hole Bilayer Tunnel FET

    European Solid-State Device Research Conference

  2. Operation and Design of van der Waals Tunnel Transistors: A 3-D Quantum Transport Study

    IEEE Transactions on Electron Devices, Vol. 63, Núm. 11, pp. 4388-4394

  3. The Electron-Hole Bilayer TFET: Dimensionality Effects and Optimization

    IEEE Transactions on Electron Devices, Vol. 63, Núm. 6, pp. 2603-2609

  4. Underlap counterdoping as an efficient means to suppress lateral leakage in the electron-hole bilayer tunnel FET

    Semiconductor Science and Technology, Vol. 31, Núm. 4

2015

  1. Efficient quantum mechanical simulation of band-to-band tunneling

    EUROSOI-ULIS 2015 - 2015 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon

  2. Modeling the imaginary branch in III-V tunneling devices: Effective mass vs k · p

    International Conference on Simulation of Semiconductor Processes and Devices, SISPAD

2014

  1. Electron-hole bilayer deep subthermal electronic switch: Physics, promise and challenges

    2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2014

  2. Two dimensional quantum mechanical simulation of low dimensional tunneling devices

    European Solid-State Device Research Conference

2011

  1. On the role of Coulomb scattering in hafnium-silicate gated silicon n and p-channel metal-oxide-semiconductor-field-effect-transistors

    Journal of Applied Physics, Vol. 110, Núm. 12

2010

  1. Comparison of semiclassical transport formulations including quantum corrections for advanced devices with high-κ gate stacks

    2010 14th International Workshop on Computational Electronics, IWCE 2010