Publikationen, an denen er mitarbeitet PEDRO CARTUJO CASSINELLO (4)

2005

  1. Double gate silicon-on-insulator transistors: N+-n+ gate versus n+-p+ gate configuration

    2005 Spanish Conference on Electron Devices, Proceedings

  2. Influence of confined acoustic phonons on the electron mobility in ultrathin silicon-on-insulator layers

    Proceedings - Electrochemical Society

2003

  1. Electron mobility in double gate silicon on insulator transistors: Symmetric-gate versus asymmetric-gate configuration

    Journal of Applied Physics, Vol. 94, Núm. 9, pp. 5732-5741

  2. Remote surface roughness scattering in ultrathin-oxide MOSFETs

    European Solid-State Device Research Conference