Publicaciones en las que colabora con ANDRÉS GODOY MEDINA (12)

2019

  1. Multisubband ensemble Monte Carlo analysis of tunneling leakage mechanisms in ultrascaled FDSOI, DGSOI, and FinFET devices

    IEEE Transactions on Electron Devices, Vol. 66, Núm. 3, pp. 1145-1152

2018

  1. Impact of Strain on S/D tunneling in FinFETs: A MS-EMC study

    International Conference on Simulation of Semiconductor Processes and Devices, SISPAD

  2. MS-EMC vs. NEGF: A comparative study accounting for transport quantum corrections

    2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2018

  3. Source-to-drain tunneling analysis in FDSOI, DGSOI, and FinFET devices by means of multisubband ensemble Monte Carlo

    IEEE Transactions on Electron Devices, Vol. 65, Núm. 11, pp. 4740-4746

2017

  1. Assessment of gate leakage mechanism utilizing Multi-Subband Ensemble Monte Carlo

    Joint International EUROSOl Workshop and International Conference on Ultimate Integration on Silicon-ULIS, EUROSOI-ULIS 2017 - Proceedings

  2. Multi-subband ensemble Monte Carlo study of tunneling leakage mechanisms

    International Conference on Simulation of Semiconductor Processes and Devices, SISPAD

2016

  1. Multi-subband ensemble Monte Carlo study of band-to-band tunneling in silicon-based TFETs

    International Conference on Simulation of Semiconductor Processes and Devices, SISPAD

2015

  1. Impact of Asymmetric Configurations on the Heterogate Germanium Electron-Hole Bilayer Tunnel FET Including Quantum Confinement

    IEEE Transactions on Electron Devices, Vol. 62, Núm. 11, pp. 3560-3566

2013

  1. The effect of quantum confinement on tunneling field-effect transistors with high-κ gate dielectric

    Applied Physics Letters, Vol. 103, Núm. 11

2012

  1. A simple approach to quantum confinement in tunneling field-effect transistors

    IEEE Electron Device Letters, Vol. 33, Núm. 10, pp. 1342-1344

  2. Impact of quantum confinement on gate threshold voltage and subthreshold swings in double-gate tunnel FETs

    IEEE Transactions on Electron Devices, Vol. 59, Núm. 12, pp. 3205-3211

  3. Simulation of fabricated 20-nm schottky barrier MOSFETs on SOI: Impact of barrier lowering

    IEEE Transactions on Electron Devices, Vol. 59, Núm. 5, pp. 1320-1327