Publicaciones en las que colabora con Carlos Navarro (33)

2024

  1. Low-Frequency Noise in InGaAs-OI Transistors

    IEEE Transactions on Electron Devices

2023

  1. 3D-TCAD benchmark of two-gate dual-doped Reconfigurable FETs on FDSOI28 technology

    Solid-State Electronics, Vol. 200

  2. Liquid-gate 2D material-on-insulator transistors for sensing applications

    Solid-State Electronics, Vol. 207

  3. Low-Frequency Noise in InGaAs-OI 1T-DRAMs

    2023 International Conference on Noise and Fluctuations, ICNF 2023

  4. Simulation of BioGFET sensors using TCAD

    Solid-State Electronics, Vol. 208

2021

  1. Hysteresis in as-synthesized mos2 transistors: Origin and sensing perspectives

    Micromachines, Vol. 12, Núm. 6

  2. Improved inter-device variability in graphene liquid gate sensors by laser treatment

    2021 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EuroSOI-ULIS 2021

  3. Performance and reliability in back-gated CVD-grown MoS2 devices

    Solid-State Electronics, Vol. 186

2020

  1. CVD-grown back-gated MoS2transistors

    2020 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2020

  2. Dual PN Source/Drain Reconfigurable FET for Fast and Low-Voltage Reprogrammable Logic

    IEEE Access, Vol. 8, pp. 132376-132381

  3. Investigating the transient response of Schottky barrier back-gated MoS2 transistors

    2D Materials, Vol. 7, Núm. 2

  4. Multi-Subband Ensemble Monte Carlo Simulator for Nanodevices in the End of the Roadmap

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

2019

  1. 3-D TCAD Study of the implications of channel width and interface states on FD-SOI Z2-FETs

    IEEE Transactions on Electron Devices, Vol. 66, Núm. 6, pp. 2513-2519

  2. Capacitor-less dynamic random access memory based on a III–V transistor with a gate length of 14 nm

    Nature Electronics, Vol. 2, Núm. 9, pp. 412-419

  3. Capacitorless memory devices using virtual junctions

    19th International Workshop on Junction Technology, IWJT 2019

  4. Investigation of thin gate-stack Z2-FET devices as capacitor-less memory cells

    Solid-State Electronics, Vol. 159, pp. 12-18