Publicaciones en las que colabora con PEDRO CARTUJO CASSINELLO (8)

2002

  1. Monte Carlo simulation of electron mobility in silicon-on-insulator structures

    Solid-State Electronics

2001

  1. Electron transport in silicon-on-insulator devices

    Solid-State Electronics, Vol. 45, Núm. 4, pp. 613-620

  2. Role of surface-roughness scattering in double gate silicon-on-insulator inversion layers

    Journal of Applied Physics, Vol. 89, Núm. 3, pp. 1764-1770

2000

  1. Deep submicrometer SOI MOSFET drain current model including series resistance, self-heating and velocity overshoot effects

    IEEE Electron Device Letters, Vol. 21, Núm. 5, pp. 239-241

  2. Effects of the inversion-layer centroid on the performance of double-gate MOSFET's

    IEEE Transactions on Electron Devices, Vol. 47, Núm. 1, pp. 141-146

1999

  1. Electron mobility in extremely thin single-gate silicon-on-insulator inversion layers

    Journal of Applied Physics, Vol. 86, Núm. 11, pp. 6269-6275

  2. Experimental determination of the effective mobility in NMOSFETs: a comparative study

    Solid-State Electronics, Vol. 43, Núm. 4, pp. 701-707

  3. Surface roughness at the Si-SiO2 interfaces in fully depleted silicon-on-insulator inversion layers

    Journal of Applied Physics, Vol. 86, Núm. 12, pp. 6854-6863