Publicaciones en las que colabora con FRANCISCO JAVIER GARCÍA RUIZ (28)

2019

  1. Memcapacitor emulator based on the Miller effect

    International Journal of Circuit Theory and Applications, Vol. 47, Núm. 4, pp. 572-579

2016

  1. On the influence of the back-gate bias on InGaAs Trigate MOSFETs

    2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2016

2015

  1. Analytic Potential and Charge Model of Semiconductor Quantum Wells

    IEEE Transactions on Electron Devices, Vol. 62, Núm. 12, pp. 4186-4191

  2. Impact of the back-gate biasing on trigate MOSFET electron mobility

    IEEE Transactions on Electron Devices, Vol. 62, Núm. 1, pp. 224-227

  3. Mobility and capacitance comparison in scaled InGaAs versus Si trigate MOSFETs

    IEEE Electron Device Letters, Vol. 36, Núm. 2, pp. 114-116

  4. The unexpected beneficial effect of the L -valley population on the electron mobility of GaAs nanowires

    Applied Physics Letters, Vol. 106, Núm. 2

2014

  1. Analytical model for the threshold voltage of III-V nanowire transistors including quantum effects

    Solid-State Electronics, Vol. 92, pp. 28-34

  2. Size-dependent electron mobility in InAs nanowires

    European Solid-State Device Research Conference

  3. Theoretical interpretation of the electron mobility behavior in InAs nanowires

    Journal of Applied Physics, Vol. 116, Núm. 17

2013

  1. An analytical mobility model for square Gate-All-Around MOSFETs

    Solid-State Electronics, Vol. 90, pp. 18-22

  2. Analytical gate capacitance modeling of III-V nanowire transistors

    IEEE Transactions on Electron Devices, Vol. 60, Núm. 5, pp. 1590-1599

  3. Effect of confined acoustic phonons on the electron mobility of rectangular nanowires

    Applied Physics Letters, Vol. 103, Núm. 16

  4. Influence of the back-gate bias on the electron mobility of trigate MOSFETs

    International Conference on Simulation of Semiconductor Processes and Devices, SISPAD

2012

  1. Analytic potential and charge model for III-V surrounding gate metal-oxide-semiconductor field-effect transistors

    Journal of Applied Physics, Vol. 112, Núm. 8

  2. Effect of interfacial states on the technological variability of trigate MOSFETs

    2012 IEEE Silicon Nanoelectronics Workshop, SNW 2012

2011

  1. Influence of orientation, geometry, and strain on electron distribution in silicon gate-all-around (GAA) MOSFETs

    IEEE Transactions on Electron Devices, Vol. 58, Núm. 10, pp. 3350-3357

  2. Simulation of the electrostatic and transport properties of 3D-stacked GAA silicon nanowire FETs

    Solid-State Electronics

  3. Surface roughness scattering model for arbitrarily oriented silicon nanowires

    Journal of Applied Physics, Vol. 110, Núm. 8

2010

  1. A model of the gate capacitance of surrounding gate transistors: Comparison with double-gate MOSFETs

    IEEE Transactions on Electron Devices, Vol. 57, Núm. 10, pp. 2477-2483

  2. Effects of deviations in the cross-section of square Nanowires

    2010 14th International Workshop on Computational Electronics, IWCE 2010