Publicaciones (19) Publicaciones en las que ha participado algún/a investigador/a

2001

  1. A simple subthreshold swing model for short channel MOSFETs

    Solid-State Electronics, Vol. 45, Núm. 3, pp. 391-397

  2. A special march test to detect delay coupling faults for RAMS

    Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

  3. Contribution of injection in current noise due to generation and recombination of carriers in p-n junctions

    Journal of Applied Physics, Vol. 90, Núm. 8, pp. 3998-4006

  4. Control PID sobre dispositivos programables

    Mundo electrónico, Núm. 323, pp. 60-61

  5. Design of RNS-based distributed arithmetic DWT filterbanks

    ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings, Vol. 2, pp. 1193-1196

  6. Electron transport in silicon-on-insulator devices

    Solid-State Electronics, Vol. 45, Núm. 4, pp. 613-620

  7. Electron transport in ultrathin double-gate SOI devices

    Microelectronic Engineering

  8. Evaluation of an equivalent hole effective mass for Si/SiGe structures

    VLSI Design

  9. Implementation of a communications using FPGAs and RNS arithmetic

    Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, Vol. 28, Núm. 1-2, pp. 115-128

  10. Implementation of the One Dimensional Discrete Cosine Transform using the Residue Number System

    Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

  11. Improving strained-Si on Si 1-xGe x deep submicron MOSFETs performance by means of a stepped doping profile

    IEEE Transactions on Electron Devices, Vol. 48, Núm. 9, pp. 1878-1884

  12. Index-based RNS DWT architectures for custom IC designs

    IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation

  13. Instrumentos, métodos y equipos de medida

    Granada (Campus de Fuentenueva, s/n, 18071 Granada) : P. García Fernández, 2001

  14. Introducción a la informática

    McGraw-Hill Interamericana de España

  15. Monte Carlo simulation of double-gate silicon-on-insulator inversion layers: The role of volume inversion

    Journal of Applied Physics, Vol. 89, Núm. 10, pp. 5478-5487

  16. Physical model for trap-assisted inelastic tunneling in metal-oxide-semiconductor structures

    Journal of Applied Physics, Vol. 90, Núm. 7, pp. 3396-3404

  17. Role of surface-roughness scattering in double gate silicon-on-insulator inversion layers

    Journal of Applied Physics, Vol. 89, Núm. 3, pp. 1764-1770

  18. Solid-State Electronics: Foreword

    Solid-State Electronics, Vol. 45, Núm. 4, pp. 539

  19. Strained-Si on Si1-xGex MOSFET inversion layer centroid modeling

    IEEE Transactions on Electron Devices, Vol. 48, Núm. 10, pp. 2447-2449