Publicaciones en las que colabora con FRANCISCO JIMÉNEZ MOLINOS (21)

2013

  1. An in-depth Monte Carlo study of low-field mobility in ultra-thin body DGMOSFETs for modeling purposes

    Solid-State Electronics, Vol. 79, pp. 92-97

  2. An in-depth simulation study of thermal reset transitions in resistive switching memories

    Journal of Applied Physics, Vol. 114, Núm. 14

2011

  1. Ultrathin n-Channel and p-Channel SOI MOSFETs

    Engineering Materials (Springer Science and Business Media B.V.), pp. 169-185

2010

  1. An analytical I-V model for surrounding-gate transistors that includes quantum and velocity overshoot effects

    IEEE Transactions on Electron Devices, Vol. 57, Núm. 11, pp. 2925-2933

  2. Hole transport in DGSOI devices: Orientation and silicon thickness effects

    Solid-State Electronics, Vol. 54, Núm. 2, pp. 191-195

2009

  1. Monte Carlo simulation of nanoelectronic devices

    Journal of Computational Electronics, Vol. 8, Núm. 3-4, pp. 174-191

2008

  1. Coulomb scattering in high- κ gate stack silicon-on-insulator metal-oxide-semiconductor field effect transistors

    Journal of Applied Physics, Vol. 104, Núm. 6

2007

  1. Quantum Ensemble Monte Carlo simulation of silicon-based nanodevices

    Journal of Computational Electronics, Vol. 6, Núm. 1-3, pp. 41-44

2005

  1. Double gate silicon-on-insulator transistors: N+-n+ gate versus n+-p+ gate configuration

    2005 Spanish Conference on Electron Devices, Proceedings

2004

  1. Double gate silicon-on-insulator transistors: N+-n+ gate versus n+-p+ gate configuration

    ESSCIRC 2004 - Proceedings of the 34th European Solid-State Device Research Conference

  2. Image and exchange-correlation effects in double gate silicon-on-insulator transistors

    Microelectronic Engineering

2003

  1. Influence of image force and many-body correction on electron mobility in ultrathin double gate silicon on insulator inversion layers

    Applied Physics Letters, Vol. 83, Núm. 15, pp. 3120-3122

  2. Modeling of retention time degradation due to inelastic trap-assisted tunneling in EEPROM devices

    Microelectronics Reliability

  3. Remote surface roughness scattering in ultrathin-oxide MOSFETs

    European Solid-State Device Research Conference

2002

  1. Coulomb scattering model for ultrathin silicon-on-insulator inversion layers

    Applied Physics Letters, Vol. 80, Núm. 20, pp. 3835-3837

  2. Direct and trap-assisted elastic tunneling through ultrathin gate oxides

    Journal of Applied Physics, Vol. 91, Núm. 8, pp. 5116-5124

  3. Electron transport in strained Si inversion layers grown on SiGe-on-insulator substrates

    Journal of Applied Physics, Vol. 92, Núm. 1, pp. 288-295

  4. Monte Carlo simulation of electron mobility in silicon-on-insulator structures

    Solid-State Electronics

2001

  1. Electron transport in silicon-on-insulator devices

    Solid-State Electronics, Vol. 45, Núm. 4, pp. 613-620

  2. Electron transport in ultrathin double-gate SOI devices

    Microelectronic Engineering