Publicaciones (19) Publicaciones de PEDRO CARTUJO CASSINELLO

2022

  1. Artificial Intelligence (AI) as a complementary technology for agricultural Remote Sensing (RS) in plant physiology teaching

    ReiDoCrea: Revista electrónica de investigación y docencia creativa, Vol. 11, pp. 695-701

2017

  1. SPICE modeling of RRAM thermal reset transitions for circuit simulation purposes

    2017 Spanish Conference on Electron Devices, CDE 2017

2005

  1. Double gate silicon-on-insulator transistors: N+-n+ gate versus n+-p+ gate configuration

    2005 Spanish Conference on Electron Devices, Proceedings

  2. Influence of confined acoustic phonons on the electron mobility in ultrathin silicon-on-insulator layers

    Proceedings - Electrochemical Society

2004

  1. Image and exchange-correlation effects in double gate silicon-on-insulator transistors

    Microelectronic Engineering

2003

  1. Electron mobility in double gate silicon on insulator transistors: Symmetric-gate versus asymmetric-gate configuration

    Journal of Applied Physics, Vol. 94, Núm. 9, pp. 5732-5741

  2. Influence of image force and many-body correction on electron mobility in ultrathin double gate silicon on insulator inversion layers

    Applied Physics Letters, Vol. 83, Núm. 15, pp. 3120-3122

  3. Remote surface roughness scattering in ultrathin-oxide MOSFETs

    European Solid-State Device Research Conference

  4. Strained-Si on Si1-xGex MOSFET mobility model

    IEEE Transactions on Electron Devices, Vol. 50, Núm. 5, pp. 1408-1411

2002

  1. Coulomb scattering model for ultrathin silicon-on-insulator inversion layers

    Applied Physics Letters, Vol. 80, Núm. 20, pp. 3835-3837

  2. Electron transport in strained Si inversion layers grown on SiGe-on-insulator substrates

    Journal of Applied Physics, Vol. 92, Núm. 1, pp. 288-295

  3. Monte Carlo simulation of electron mobility in silicon-on-insulator structures

    Solid-State Electronics

2001

  1. Electron transport in silicon-on-insulator devices

    Solid-State Electronics, Vol. 45, Núm. 4, pp. 613-620

  2. Role of surface-roughness scattering in double gate silicon-on-insulator inversion layers

    Journal of Applied Physics, Vol. 89, Núm. 3, pp. 1764-1770

2000

  1. Deep submicrometer SOI MOSFET drain current model including series resistance, self-heating and velocity overshoot effects

    IEEE Electron Device Letters, Vol. 21, Núm. 5, pp. 239-241

  2. Effects of the inversion-layer centroid on the performance of double-gate MOSFET's

    IEEE Transactions on Electron Devices, Vol. 47, Núm. 1, pp. 141-146

1999

  1. Electron mobility in extremely thin single-gate silicon-on-insulator inversion layers

    Journal of Applied Physics, Vol. 86, Núm. 11, pp. 6269-6275

  2. Experimental determination of the effective mobility in NMOSFETs: a comparative study

    Solid-State Electronics, Vol. 43, Núm. 4, pp. 701-707

  3. Surface roughness at the Si-SiO2 interfaces in fully depleted silicon-on-insulator inversion layers

    Journal of Applied Physics, Vol. 86, Núm. 12, pp. 6854-6863